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TSM1121
3.3V 5V 12V HOUSEKEEPING IC
s s s s s s s s s s s Over voltage protection for 3.3V 5V and 12V without external components Under voltage protection for 3.3V 5V and 12V without external components Over voltage protection for -12V or -5V with external components Externally adjustable under voltage blanking during power up Power good input/output Externally adjustable pg delay Fault output Remote output Externally adjustable remote delay Precision voltage reference 2kV ESD protection
N DIP14 (Plastic Package)
D SO14 (Plastic Micropackage)
PIN CONNECTIONS (top view) DESCRIPTION
The TSM1121 integrated circuit incorporates all sensing circuitry to regulate and protect from over voltage and under voltage a multiple output power supply (3.3V, 5V and 12V). TSM1121 incorporates all the necessary functions for Housekeeping features which allow safe operation in all conditions, and very high system integration. TSM1121 integrates a precise voltage reference.
VS33 VS5 VS12 EP PI
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC FAULT PG TPG TREM REM VREF
APPLICATION
s PC SMPS triple power line housekeeping ic (3.3V 5V 12V)
TUV GND
ORDER CODE
Part Number
TSM1121CN TSM1121CD
Temperatur e Range
0 to 85C 0 to 85C
Package Marking N
* *
D
TSM1121C M1121
Note: N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT)
May 2003
Revision A
1/11
TSM1121 1 PIN DESCRIPTION
Name
Vcc Gnd Vs12 Vs5 Vs33 Tuv Fault PI PG Tpg REM Trem Vref EP
Pin Description
Pin #
14 7 3 2 1 6 13 5 12 11 9 10 8 4
Type
Power Supply Power Supply Analog Input Analog Input Analog Input Timing Capacitor Open Collector Analog Input Open Collector Timing Capacitor Logic Input
Function
Positive Power Supply Line Ground Line. 0V Reference For All Voltages Over and Under voltage Sense Input Dedicated to the 12V Line1 Over and Under voltage Sense Input Dedicated to the 5V Line1) Over and Under voltage Sense Input Dedicated to the 3.3V Line1) Adjustable Under voltage Blanking Delay at Power Up (Setting Capacitor) Fault Output. Fault is high when Over or Under Voltage has been Detected Power Good Input. Detection of the Power Conditions Power Good Output. PG output is High when the Power Conditions are OK Adjustable Power Good Delay (Setting Capacitor) Input Remote Control of the Complete System by the Motherboard (Controller). Remote is active high. Switch OFF/ON of the Power Supply. Reset of the Complete System after a FAULT Activation. Adjustable Remote Delay (Setting Capacitor). 2.5V Reference for all Voltages Extra Protection Circuit. Can be used for -12V or -5V Over Voltage Protection.
Timing Capacitor Voltage Reference Analog Input
1) Over and Under Voltage Inputs can go higher than Vcc within the allowed Max Rating range
ABSOLUTE MAXIMUM RATINGS
Symbol
Vcc Iout Io VFault Pd Tstg ESD Tuv EP PI PG Tpg REM Trem
1
DC Supply Voltage
DC Supply Voltage Output Current Power Good Output current for the Voltage reference Fault Ouput Power Dissipation Storage Temperature Electrostatic Discharge Adjustable Under voltage Blanking At Power UP Extra Protection Power Good Input Power Good Output Adjustable Power Good Delay Remote Control Adjustable Remote Delay
Value
25 30 20 5 0.7 -55 to 150 2 5 5 5 5 5 5 5
Unit
V mA mA V W C kV V V V V V V V
1) All voltage values, except differential voltage are with respect to network ground terminal.
OPERATING CONDITIONS
Symbol
Vcc Toper
Parameter
DC Supply Conditions Operating Free Air Temperature Range
Value
4.5 to 24 0 to 85
Unit
V C
2/11
Electrical Characteristics 2 ELECTRICAL CHARACTERISTICS
Parameter
Total Supply Current Over Voltage and Under Voltage Protection Over Voltage Sense 3.3V Input can go higher than 3.8 Vcc Over Voltage Sense 5V Input can go higher than 5.8 Vcc Over Voltage Sense12V Input can go higher than 13.4 Vcc Under Voltage Sense 3.3V 2.1 Under Voltage Sense 5V 3.7 Under Voltage Sense 12V 9.2 Extra Over voltage Protection Threshold Fault Delay Before Latching Internally Fixed Delay Under Voltage Blanking During Power Up (Vcc rising) Blanking Threshold Cuv = 2.2F Adjustable Blanking
TSM1121
Tamb = 25C and Vcc = 17V (unless otherwise specified) Symbol
Icc Vov33 Vov5 Vov12 Vuv33 Vuv5 Vuv12 Vep Tfault
Test Condition
Min
Typ
3 4 6.1 14.2 2.3 4 10 1.28 100
Max
5 4.2 6.4 15 2.5 4.3 10.8
Unit
mA V V V V V V V s
Total Current Consumption
Under Voltage Blanking During Power Up
Tuv Thuv Vpgth 100 300 1.28 1.28 70 Collector Current = 15mA PG Output = 5V Load Capacitor = 100pF Load Capacitor = 100pF Load Capacitor Cpg=2.2F 1 1 300 1.28 1 1 0.4 1 500 ms V V mV V A s s ms V V A
Power Good (PG)
Power Good Voltage Threshold Power Good Voltage Threshold HysterVpghyst esis Low Output Open Collector Saturation Vpgol Voltage High Output Open Collector Leakage Ipgoh Current Tpgr Power Good Output Rise Time Tpgf Power Good Output Fall Time Tpg Power Good Adjustable Delay PIth Power Input Detection Threshold
100
500
Fault
Vfaultol Ifaultoh Fault Output Saturation Voltage Level Fault Output Leakage Current Level IFault = 1mA Vfault = 5V
Remote Control (REM)
Vremth Vremih Iremil Trem1 Trem2 Remote ON/OFF Input Voltage Threshold High Input Remote Voltage Low Input Remote Saturation Current Remote Adjustable Delay ON to OFF Load Capacitor Crem=0.1F Remote Adjustable Delay OFF to ON Load Capacitor Crem=0.1F Internal Voltage Reference Line regulation Line regulation Io = 0mA Io = 0mA 4.5VVoltage Reference
Vref Regline Regline 2.46 2.5 4 15 25 2.54 10 V mV mV mV
Regload Load regulation 1
1) Do not short circuit the Vref Pin
3/11
TSM1121
Fig. 1: Application Schematic
12V 5V 3.3V
Electrical Characteristics
12V 5V 3.3V
~
PRIMARY RECT.
MAIN CONV.
PWM + OPTO + Vref
AUX. CONV.
Vcc 5Vstby 5Vstby
PWM + OPTO + Vref
TSM1121
Over & Undervoltage Protection FAULT Reference Logic Sequencer
PG REM
Fig. 2: Internal Schematic
Vcc
TO POWER SUPPLY OUTPUT
12V 5V 3.3V
Vs12 Vs5 Vs33 OVP UVP
TSM1121
LOGIC SECONDARY HOUSEKEEPING
PI PG FAULT REM Trem Tpg
Ep 12V FROM MAIN CONV. Gnd 5V 3.3V Vref Vref UV BLANK
Tuv
4/11
to MOTHERBOARD
Electrical Characteristics
Fig. 3: Detailed Internal Schematic
TSM1121
Vcc VS12 3 Vov12
Vref
14 1k FAULT 13
OVP Tfault S R UVP Q
3.47V 1.28V Tuv 6 Cuv
Vuv12 VS5 2 Vov5 Trem
Vref
Trem 10 3.47V Crem Rem 9 Pg 12
Vuv5 VS33 1 Vov33
Vref
0.8V 1.28V
3.47V Vuv33 EP 4 1.25V Vref 8 1.28V VREF VovEP Tpg 11 Cpg
TSM1121
Gnd 7
PI 5
5/11
TSM1121 Principle of Operation and Application Hints
TSM1121: Housekeeping IC.
TSM1121 is a one chip solution for all PC SMPS: it integrates on one chip the Housekeeping Circuitry (Over Voltage and Under Voltage protections, with adequate sequencing).
Latch OFF
The Over Voltage and Under Voltage Circuits outputs are again ORed before activating a latch. When activated, this latch commands the full switch OFF of the three main power lines (3.3V, 5V, 12V) by an external link between the housekeeping and the primary PWM circuits via the main optocoupler or any other device . Note that the Under Voltage Circuit, after Power Up UV blanking, bears no other delay to the latch setting input whereas the Over Voltage circuit bears an additional Tfault delay time. This allows an efficient protection against Output Short Circuit conditions.
Triple Power Line Protection
The TSM1121 Housekeeping Circuit is dedicated to 3.3V, 5V and 12V power lines protection. It integrates a Precision Voltage Reference, a Triple Over Voltage Protection Circuit and a Triple Under Voltage Protection Circuit as well as all the necessary logic and transient timing management circuits for optimal and secure communication with the motherboard, during start up, switch off and stabilized conditions.
Power Good
The Over Voltage and Under Voltage Circuits are Ored to switch the Power Good output active (PG) to warn the motherboard that the voltage of at least one of the three power lines is out of range. The PG activation bears an internal Tpg delay circuitry which can be adjusted with an external capacitor (Cpg).
Over Voltage Protection
The Over Voltage Protection Circuit is made of three comparators with internal voltage thresholds (Vov33, Vov5, Vov12) which do not require any external components for proper operation. The outputs of these three comparators are ORed.
Under Voltage Protection
The Under Voltage Protection Circuit is made of three comparators with internal voltage thresholds (Vuv33, Vuv5, Vuv12) which do not require any external components for proper operation. The outputs of these three comparators are ORed, and blanked by an internal delay circuitry (Power Up Blanking - Tuv) which can be adjusted with an external capacitor (Cuv). This allows that during power up, the under voltage protection circuit is inhibited.
Remote Control
Thanks to this information link to the motherboard, a resetting signal to the latch is achievable with the Remote pin (REM). When the Remote pin is active, the external Fault link between Housekeeping circuit and the PWM generator is active (high = PWM OFF) and the PG pin is active (high). Note that to reset effectively the latch, a minimum width Remote pulse should be applied thanks to an internal delay circuitry (Trem) which can be adjusted with an external capacitor (Crem).
6/11
Application Information 3 APPLICATION INFORMATION 2 - Pi & Vs5 On/Off
Vcc
TSM1121
1 - Rem On/Off
Vcc
Gnd Vs5
Gnd Vs5
EP&PI=Vref
Pi
Rem
Rem
TRem
TRem
Fault Trem Trem
Fault Tuv
Tuv
Tpg
Tpg
Tpg Pg
Pg
Tpg
7/11
TSM1121 3 - OVP Rem On/Off, Tuv start up OK
Vcc
Application Information 4 - OVP Rem On/Off, Tuv start up NOK
Vcc
Gnd Vs5
Ovp level
Gnd Vs5
Uvp level
Ovp level
Uvp level
EP&PI=Vref
EP&PI=Vref
Gnd
Gnd
Rem
Rem
TRem
TRem
Tfault TRem Fault Tuv
Tfault TRem Fault Tuv Tuv
Tpg Pg Tpg
Tpg Pg
8/11
Application Information Truth Table for OVP and UVP detection
EP
Vref Vref Vref Vref Vref Vref Vref Vref <1.28V Vref Vref Vref
TSM1121
PI
Vref Vref Vref Vref Vref Vref <1.28V Vref Vref Vref Vref Vref
Vsxx
OK OK OVP on Vsxx OK OK OK OK OK OK OK OK OK
Rem
1 0 0 0 1 0 0 0 0 0 1 0
Fault
1 0 1 1 1 0 0 0 1 1 1 0
PG
0 1 0 1 0 1 0 1 0 0 0 1
Power supply state
Remote OK OVP detected Fault latched Remote OK UVP detected on PI OK UVP detected on EP Fault latched Remote OK
9/11
TSM1121 4 PACKAGE MECHANICAL DATA
PACKAGE MECHANICAL DATA
Plastic DIP-14 MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001A
10/11
PACKAGE MECHANICAL DATA 5 PACKAGE MECHANICAL DATA
SO-14 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
TSM1121
PO13G
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com
11/11

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